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^{1}Electrical and Energy Department,

^{2}Department of Computer Engineering,

^{3}Department of Electrical and Electronic Engineering,

^{4}Department of Mechanical Engineering,

Correspondence Address: Prof. Hasan Komurcugil, Department of Computer Engineering, Eastern Mediterranean University, Salamis Road, Famagusta 99628, Turkey. E-mail: hasan.komurcugil@emu.edu.tr

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This paper presents a model predictive control (MPC) method for single-phase three-level grid-connected F-type inverters. The main control objective in grid-connected inverters is to regulate the grid current with low total harmonic distortion. Since the F-type inverter has emerged recently, there is no specific control method developed for this inverter topology in the literature yet. In this paper, the mathematical model of the F-type inverter and the design of model predictive control is presented. Since the dc capacitor voltage balancing is essential for F-type inverters, both current control and dc capacitor voltage controllers are combined in a multi-objective cost function. Thus, the control of the dc and ac sides of the F-type inverter is achieved successfully. The theoretical considerations were verified through simulation studies. The effectiveness of the proposed MPC method was investigated in the steady state as well as dynamic transients under variations in grid current, input dc voltage, and grid voltage. The simulation results show that the grid current and dc capacitor voltages are successfully controlled in all operating conditions.

F-type inverter, model predictive control, grid connected inverter

The high demand for electrical energy in commerce as well as industry has increased the importance of renewable energy sources in the last decades. The integration of renewable energy sources to the grid can be accomplished by using inverters. Therefore, the use of various inverters in such applications is increasing day by day. Initially, traditional two-level voltage source inverters were widely preferred in the grid-connected applications. However, multilevel inverters have gained importance due to the low harmonic distortions in output voltage and current^{[1-4]}. In addition, operating under low switching frequencies and low voltage stress can be specified as the other advantages of multilevel inverters^{[5]}.

Mainly, three different multilevel topologies, namely cascaded H-bridge (CHB)^{[6]}, flying capacitor (FC)^{[4]}, and neutral point clamped (NPC)^{[7]}, inverters are presented in the literature. The features and applications of these three topologies are different^{[1,8]}. Since CHB inverters require isolated and symmetrical input sources for each H-bridge, they are preferred in multi-source systems^{[9]}. However, the generation of the multi-level voltages in CHB inverters using a single power source is a challenging issue. Therefore, CHB inverters are not suitable for such systems. Switching device configurations of conventional diode clamped NPC and FC topologies are the same^{[10,11]}. On the other hand, the middle-level voltages in both FC and NPC inverters are provided by capacitor voltages. However, the number of capacitors increases depending on the level of the inverter and the phase number in the FC topology. Therefore, the requirement of many capacitors and high capacitance in FC topologies is specified as the main disadvantage^{[5]}. The capacitor number in NPC inverters is not dependent on phase number. Therefore, the required capacitance and cost are lower than FC topologies. In addition, the control of capacitor voltages in FC topologies is more complicated than in NPC inverters^{[12]}.

The diode clamped topology is the base model of the neutral point clamped inverters. Since the required diode number is dependent on voltage levels, it becomes a challenging issue for diode-clamped NPC inverter applications. T-type inverters have the same features as the NPC topology^{[13]}. The main advantage of the T-type inverter compared to NPC inverters can be specified as the elimination of the diode requirement. Similar to the NPC topology, series-connected capacitors are used in the dc side of T-type inverter. Contrary to NPC inverters, the neutral point is connected through bidirectional switches in the T-type inverter. Hence, the diode requirement is eliminated. Among the multilevel inverter topologies, the T-type inverter has fewer components^{[13]}. The F-type inverter was recently derived from the T-type inverter topology^{[14]}. In T-type inverters, 50% of switches should have a full dc-link reverse blocking voltage rating while it is 25% in F-type inverters^{[14]}. Therefore, the cost and losses of F-type inverters are lower than those of T-type inverters. Similar to the diode-clamped NPC and T-type topologies, the voltage levels are obtained using dc side capacitor voltages in the F-type inverter. Therefore, the capacitor voltages should be well-balanced to achieve voltage levels properly.

In addition to topologies, the control methods are important for the proper operation of the inverter. However, the control of F-type inverters has not been reported in the literature yet. In general, the control objectives for a grid-connected inverter can be specified as low total harmonic distortion (THD) in the grid current, fast dynamic response, and robustness to disturbances in input and output variables^{[15]}. In addition, dc capacitor voltage balancing is essential in controlling of NPC, T-type, and F-type topologies^{[16,17]}. The nonlinear control methods offer fast dynamic response under variations in operating point. For this reason, the model predictive control (MPC) and sliding mode control (SMC) methods have gained great attention in the last decade^{[18-20]}. The performance of the SMC method is independent of the system parameters^{[21]}. Besides this advantage, the chattering and determining the controller gain are the key challenges^{[22]}. Especially, the controller gains have an effect on the controller performance. However, the gain tuning method is not available in the literature yet. In addition, the design of the SMC method for controlling systems with many variables can be stated as another challenge^{[22]}. It is worth noting that the switching signals are generated by using modulation schemes or hysteresis band in most of the sliding mode controllers^{[16,23]}. The complexity of modulation schemes is dependent on the switch number of power converters. Therefore, the implementation of the control method becomes complex. Although the finite control set (FCS) concept causes variable switching frequency, FCS is widely preferred in controlling power converters due to the capability of eliminating the complex modulation schemes. Since the combination of FCS structure and MPC method exhibits an excellent performance, the FCS-MPC method is employed in controlling complex power converters^{[13]}. The MPC is structured based on the mathematical model of the system. The key feature of the MPC method is the ability to solve multi-objective control problems using a total cost function^{[24]}. As mentioned above, the control of both grid current and dc side capacitor voltages should be accomplished at the same time for proper operation of F-type inverters. Therefore, the control problem of the F-type inverter is a multi-objective function.

Since F-type inverters have emerged recently, control of these inverters has not been reported in the literature yet. In this paper, an MPC method is proposed for single-phase three-level grid-connected F-type inverters. As mentioned above, the proper operation of F-type inverter can be achieved by controlling both grid-current and capacitor voltages. Therefore, the choice of MPC is due to its multi-objective cost function feature. The effectiveness of the proposed method was investigated in simulation studies under both steady-state and dynamic conditions.

A single-phase three-level grid-connected F-type inverter is depicted in Figure 1. Clearly, each leg of the F-type inverter consists of four switches. The switching configurations of the single-phase F-type inverter are given in Table 1. Figure 2 shows the equivalent circuits of the F-type inverter based on the switching states in Table 1. Similar to the three-level T-type topology, five different voltage levels can be achieved at the output of the inverter. There are nine different switching states, and three of them (States 1, 5, and 9) generate 0, two of them (States 2 and 3) generate *V*_{dc}*/2*, and two of them (States 6 and 7) generate *-V*_{dc}*/2*.

Table 1

Inverter output voltage under switching states

State | V_{ab} | ||||
---|---|---|---|---|---|

1 | ON | ON | ON | ON | 0 |

2 | ON | ON | OFF | ON | V = _{C1}V/2_{dc} |

3 | OFF | ON | OFF | OFF | V = _{C2}V/2_{dc} |

4 | ON | ON | OFF | OFF | V_{dc} |

5 | OFF | ON | OFF | ON | 0 |

6 | OFF | ON | ON | ON | -V = _{C1}-V/2_{dc} |

7 | OFF | OFF | OFF | ON | -V = _{C2}-V/2_{dc} |

8 | OFF | OFF | ON | ON | -V_{dc} |

9 | OFF | OFF | OFF | OFF | 0 |

Figure 2. Equivalent circuits based on Table 1: (A) State 1; (B) State 2; (C) State 3; (D) State 4; (E) State 5; (F) State 6; (G) State 7; (H) State 8; and (I) State 9.

As shown in Table 1, ±*V*_{dc}*/2* can be provided from *C _{1}* or

As clearly seen in the equivalent circuits, *S*_{1a} is exposed to *V*_{dc} in the 7th, 8th, and 9th switching states [Figure 2G-I]. In addition, *S*_{1b} is exposed to *V*_{dc} in the 3rd, 4th, and 9th switching states [Figure 2G-I]. Therefore, the blocking voltage of *S*_{1a} and *S*_{1b} should be equal to or higher than *V*_{dc}. On the other hand, the other switches are series connected. Therefore, their voltage level can be half of *V*_{dc}. This fact reduces the total cost, system size, and switching losses^{[14]} of the F-type inverter.

The output voltage of the inverter can be written in terms of switching states as follows:

where *V*_{C1} and *V*_{C2} are the voltages of *C _{1}* and

where *i*_{g} is the current injected to the grid, *r* is the resistance of inductor, *L* is the filter inductance, and *v*_{g} is the grid voltage.

The derivative of the grid current can be written by using Equation (2) as follows:

Similar to *V*_{ab}, the capacitor currents (*I*_{C1} and *I*_{C2}) can be defined in terms of switching states by

Now, the derivative of the capacitor voltages can be written as follows:

In this section, the MPC of the three-level grid-connected F-type inverter is introduced. There are three control variables (*i*_{g}, *V*_{C1}, and *V*_{C2}) to be controlled. Since the MPC method is able to control more than one variable by using a multi-objective cost function, it is preferred for controlling F-type inverters. The design of MPC method can be summarized in three steps: prediction, calculation of the total cost function, and minimization. Predictive equations of the control variables can be obtained by using forward Euler approximation as

where *i*_{g}(*k* + 1) is the predicted value of the grid current at (*k* + 1)th sampling instant and *T*_{s} is the sampling time. Now, substituting Equation (3) into Equation (8) gives the predictive equation of the grid current as

where *V*_{ab}^{(n)} is the output voltage, which is obtained by using Equation (1).

Next, the predicted values of the capacitor voltages at (*k* + 1)th sampling instant can be obtained by substituting Equations (6) and (7) into Equation (8) as follows:

The predictive equations of all the control variables are obtained. Now, the cost functions can be written in terms of the errors between predicted and reference variables. The cost function for the grid current can be written as

where is the reference grid current.

As mentioned above, the dc side capacitor voltages should be balanced. Therefore, the references of *V*_{C1}(*k*) and *V*_{C2}(*k*) should be equal to *V*_{dc}/2. Hence, the error between *V*_{C1}(*k*) and *V*_{C2}(*k*) will be zero in the steady state. Therefore, the second cost function can be written as the error between *V*_{C1}(*k* + 1) and *V*_{C2}(*k* + 1) as follows:

Now, cost functions can be combined in a multi-objective total cost function as follows:

where λ is the weighting factor that is used to determine the weight of different cost terms in the multi-objective cost function.

The flowchart of the proposed MPC algorithm is depicted in Figure 3. The algorithm starts with the measurements of the system variables. Thereafter, the predicted values of the control variables at (*k* + 1) sampling instant are calculated for the nine possible switching states in Table 1. At the same time, the cost function in Equation (14) is also calculated for each possible switching state, and each cost function value is stored in the control software. After these calculations, the obtained cost results are evaluated using minimization, and the minimum cost value is found. Finally, the optimal switching vector is selected depending on the minimum cost results. In other words, the switching vector which gives the minimum cost result is selected as optimal.

Steady-state and dynamic responses of the proposed control method were investigated by simulation studies using MATLAB/Simulink environment. The block diagram of the proposed control strategy is depicted in Figure 4, while the system parameters are given in Table 2.

Table 2

System parameters

Description and symbol | Value |
---|---|

Grid voltage amplitude: v_{g} | 150 V |

Input Voltage: V_{dc} | 200 V |

Inductance: L | 5 mH |

Inductor resistance: r | 0.1 Ω |

DC capacitors: C and _{1}C_{2} | 470 µF |

Weighting factor: λ | 0.001 |

Sampling time: T_{s} | 30 µs |

Figure 5 shows the steady-state responses of system variables. As shown in Figure 5A, the amplitude of the grid voltage is 150 V with 50 Hz fundamental frequency. Figure 5B shows the inverter output voltage. Since the input voltage (*V*_{dc}) of the inverter is 200 V, the maximum value of the output voltage is equal to *V*_{dc}. On the other hand, the middle-level voltages are equal to half of ±*V*_{dc}/2. Since the middle-level voltages are provided by *V*_{C1} and *V*_{C2}, the capacitor voltages should be well-balanced. As shown in Figure 5C, *V*_{C1} and *V*_{C2} have different levels at the beginning of the simulation. Thereafter, *V*_{C1} and *V*_{C2} are successfully balanced by the proposed algorithm. As shown in Figure 5D, the dc side voltage error between *V*_{C1} and *V*_{C2} are balanced within ±1% error band. Figure 5E shows the grid current and amplitude of reference current. Clearly, the amplitude of the grid current is successfully regulated to reference. Similar to the dc side voltage error, the current tracking is achieved with ±0.5 A error. The errors on both dc and ac sides can be reduced by decreasing *T*_{s}. However, low *T*_{s} can only be used with a sophisticated microcontroller, which is an expensive solution in practice. Therefore, the effect of errors in THD, which is one of the important performance indicators, should be checked. Figure 6 shows the spectrum and THD results of the grid current. The THD is measured to be 1.1%, which meets the recognized standard.

Figure 5. Steady-state responses of system variables: (A) grid voltage; (B) inverter output voltage; (C) capacitor voltages; (D) dc voltage error; (E) grid current and amplitude of reference current; and (F) grid current error.

In addition to the steady-state performance, the dynamic responses are also important performance indicators in controlling grid-connected inverters. The dynamic response of the controller was tested under step change in reference current, and the results are presented in Figure 7. As shown in Figure 7A, the amplitude of the reference current is increased from 10 to 20 A. After the step change, the amplitude of the injected current to the grid is successfully regulated to its new reference. The grid current error between the reference and actual current is given in Figure 7B. Clearly, the current error increases to 10 A at the transition time. Thereafter, the error is removed within 1 *ms* by the proposed controller. On the other hand, the voltage levels in *V*_{ab} are as desired under both 10 and 20 A references, as shown in Figure 7C. Furthermore, *V*_{C1} and *V*_{C2} voltages are well-balanced in both reference values.

Figure 7. Dynamic responses under step change in reference current: (A) grid current and amplitude of reference current; (B) grid current error; (C) inverter output voltage; and (D) capacitor voltages.

The second dynamic response test is examined under variations in the input dc voltage. As shown in Figure 8A, *V*_{dc} is abruptly increased from 200 to 250 V. The results in Figure 8B show that the maximum value of *V*_{ab} changes depending on *V*_{dc}. Furthermore, the voltage levels are generated properly after the step change. As mentioned above, the voltage levels are dependent on *V*_{C1} and *V*_{C2}; therefore, the capacitor voltages should be regulated to half of *V*_{dc}. As shown in Figure 8C, both capacitor voltages are increased from 100 to 125 V. Clearly, the voltage balancing part of the proposed MPC successfully regulates the capacitor voltages under variations in *V*_{dc}. Moreover, the injected current to the grid is successfully regulated its reference in both *V*_{dc} values, as shown in Figure 8D.

Figure 8. Dynamic responses under variations in input dc voltage: (A) input dc voltage; (B) capacitor voltages; (C) inverter output voltage; and (D) grid current and amplitude of reference current.

In the last dynamic response test, the effectiveness of the proposed controller is investigated under 20% decrement in the grid voltage. As shown in Figure 9A, the amplitude of the grid voltage is abruptly decreased from 150 to 120 V. *V*_{C1} and *V*_{C2} are balanced and *i*_{g} is regulated to its reference in both grid voltage conditions, as shown in Figure 9B and C. Since the capacitor voltages are not changed during the simulation, voltage levels in *V*_{ab} are not affected by the decrement in grid voltage. The decrement in the grid voltage affects the modulation level of the output voltage (*V*_{ab}) in the grid connected inverter. As shown in Figure 9D, the third voltage level (between 100 and 200 V in *V*_{ab}) in *V*_{ab} is narrowed after the decrement. These results reveal that the proposed MPC method is able to control the F-type inverter under different grid conditions.

A model predictive control method is proposed for the single-phase three-level grid-connected F-type inverters which have emerged recently. The main objective of this study was to investigate the applicability of MPC in controlling F-type inverters. Since the capacitor voltages and grid current should be controlled at the same time to achieve the proper operation of F-type inverters, the multi-objective cost function feature of MPC method is used. The effectiveness of the proposed controller was investigated under steady-state operation. Furthermore, the dynamic response capability of MPC was tested under variations in reference current, input dc voltage, and grid voltage. The results show that the proposed method is capable of controlling the F-type inverter under both steady-state and dynamic operating conditions. Moreover, dc side capacitor voltages were regulated in all operating conditions by the proposed MPC method. Furthermore, THD results show that the distortions in the injected current to the grid met the recognized standard. Thus, the proposed MPC method together with F-type inverter can be considered as an alternative solution to existing control methods with T-type inverter.

Writing - original draft, conducting simulations, writing - review & editing: Guler N, Komurcugil H, Biricik S, Karimi HR

Methodology: Guler N

Formal analysis, investigation, supervision: Komurcugil H

Literature survey, visualization: Biricik S

Conceptualization: Karimi HR

Availability of data and materialsNot applicable.

Financial supportNone.

Conflicts of interestAll authors declared that there are no conflicts of interest.

Ethical approval and consent to participateNot applicable.

Consent for publicationNot applicable.

Copyright© The Author(s) 2021.

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Guler N,
Komurcugil H,
Biricik S,
Karimi HR. Model predictive control for single-phase three-level grid-connected F-type inverters.
* Complex Eng Syst* 2021;1:2.
http://dx.doi.org/10.20517/ces.2021.07

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